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Career Vacancies at ZiiLABS

Current Vacancies

DFT Engineer - Surrey UK

The successful candidate will be working in a small team. The position would suit an engineer looking for a career involving all aspects of SOC Design For Test (DFT) and production test bring-up.

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Responsibilities to Include:
  • Test logic design and verification
  • BIST integration and verification
  • ATPG pattern generation
  • ATPG test coverage analysis and improvement
  • Production testing of analogue and IP blocks
  • STA constraint development for test
  • Back-annotated test vector simulation and debug
  • Test program bring-up and post-silicon test debug
Qualifications, Skills and Experience
  • Experience in DFT/ATPG
  • RTL and gate-level debug/verification
  • Experience in using RTL/gate-level simulators
  • Proficient in Unix/Linux
  • Scripting skills, preferably Perl
  • An Electronic Engineering Degree or equivalent
  • Some ATE or lab-based silicon debugging skills are desirable

The role is based at our UK Design Centre in Surrey. Remuneration package will be commensurate with experience, and includes excellent basic salary, pension scheme, private health scheme, and life assurance.

Media Framework Engineer - Surrey UK

The successful candidate will be working in a small team, developing the media framework to support audio/video, playback/capture, on ZiiLABS ARM based media processors, under Android and Linux.

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Responsibilities to Include:
  • Developing ZiiLABS proprietary media framework to add value beyond the core Android functionality.
  • Implementing media network protocols, video conferencing engines, media containers, handling A/V synch, interfacing to a range of codecs, supporting trick playback features, etc.
  • Providing feedback to the chip architecture team to aid improvements in design.
Qualifications, Skills and Experience
  • Excellent current 'C' and 'C++' programming.
  • Experience of working with media frameworks.
  • Strong debugging/fault finding skills.
  • Experience of writing assembler for processor arrays and/or VLIW processors.
  • Preferably a Software or Electronic Engineering Degree or equivalent (i.e. a Maths or Physics degree where the candidate has understanding of, or interest in, complex hardware systems).

The role is based at our UK Design Centre in Surrey. Remuneration package will be commensurate with experience, and includes excellent basic salary, pension scheme, private health scheme, and life assurance.

Graduate Validation Engineer - Surrey UK

The successful candidate will be working in a small team, creating C++ models to aid in the validation of leading edge processors.

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Responsibilities to Include:
  • Development of C++ simulation models from architectural specifications.
  • Development of C++ tests for proving models performs as expected/specified.
  • Providing feedback to architecture team to aid improvements in design.
  • Providing test support to Hardware designers.
Qualifications, Skills and Experience
  • Good understanding of C/C++.
  • Mixed knowledge of software and digital hardware design.
  • Strong debugging/fault finding skills.
  • Experience of Linux based systems would be useful but not essential.
Education

Electrical/Electronic Engineering Degree would be preferable. An equivalent degree (software engineering, mathematics or physics degree) whereby the candidate has an understanding or interest in the development of complex digital hardware systems would also be accepted.

When applying, candidates must demonstrate, either in CV or via covering letter how they have used C / C++. This should include a description of the problem and amount of time taken.

The role is based at our UK Design Centre in Surrey. Remuneration package will be commensurate with experience, and includes excellent basic salary, pension scheme, private health scheme, and life assurance.