The ZMS-05 is a fully programmable, media-rich applications processor capable of delivering high-performance application, graphics and multimedia capabilities within a low-power environment.

The multi-core, System-on-Chip design combines a flexible media-processing array with dual ARM cores to achieve a fully balanced system for delivering the optimal acceleration of CPU and media-intensive tasks. Three fully featured video processing units provide glue-less connection to a wide range of displays and cameras. A broad range of I/Os and peripheral functions are fully integrated on-chip to ease system design and reduce overall system costs.

• Overview
• Block Diagram
• Performance
• Technical Specifications

HD Media and Graphics Processing

The HD media-processing array, based on ZiiLABS' unique stemcell computing architecture, offloads the ARM CPU to provide high-efficiency, multi-format video, graphics and image processing.

• High compute density SIMD architecture
• High resolution - decode to 1080p / 720p encode
• Simultaneous video encode/decode at D1
• Wide rage of optimised CODECs and APIs
• Accelerated OpenGL ES 3D graphics
• Hardware compositing
• Advanced image processing
• 8 GFlops programmable compute

ARM Core

The ARM subsystem, based on dual ARM926 EJ-S cores, provides high-performance, low-power application processing, leaving the media processing array to perform the heavy lifting media work.

Rich Peripheral Integration

A rich suite of integrated system peripherals and interfaces minimize overall system costs and design footprint;

• 64/32 bit memory interface
• Three bi-directional video units
• USB 2.0 controller
• Three SDIO/MMC/CE-ATA controllers
• HDTV out
• General interface supporting ethernet, NAND and NOR
• Serial connectivity
• Hi-Fidelity audio

Low-Energy

Total system power is minimized at all times by the application of advanced power management throughout the processor and supporting software and includes: dynamic clock and voltage scaling, independent power down regions, multiple clock domains and gating, and suspend to RAM.

Click here to expand in new window

• High-performance, flexible video processing
• H.264 HD 720p decode at 30 fps, 8mbps
• H.264 D1 encode
• Simultaneous H.264 VGA encode and Decode
• OpenGL ES 3D Graphics
• 42M textured pixels/sec
• 21M vertices/sec
• High Performance Compute
• 8GFLOPS, 32GOPS
• 2.6 GBytes/sec memory bandwidth

Low-energy HD Media Processing

High compute density SIMD architecture Ideally suited for media processing tasks Accelerate a wide range of current and emerging standards Video, imaging, 2D/3D graphics, audio and signal processing Offloads the CPU from intensive media tasks Integer and IEEE 32-bit and 16-bit floats

Dual ARM processor cores

Dual ARM926 EJ-S Scalable system performance Optimal power management

High-Definition Video

High resolution - decode to 1080p / 720p encode Wide range of video codecs, including: H.264, MPEG 1/2/4, WMV/VC-1 and others Integrated HD 1080p analog TV encoder

High Quality 2D/3D Graphics

Powerful floating-point 3D graphics Supports OpenGL ES 1.1 and 2.0 2D graphics acceleration Hardware compositing Advanced UI features and experiences

High-Fidelity Audio

High quality audio encode and decode Wide range of audio codecs including: MP3, AAC, WMA, AAC, Ogg Vobis and others Special effects

High Quality Imaging Processing

Software Defined Imaging Pipeline

Low Power Consumption

Low power architecture Dynamic Voltage and Frequency Scaling Multiple clock domains and clock gating 16 independent power down regions Suspend to RAM for standby

High Level System Integration

USB 2.0 OTG controller Analog HD TV encoder Three independent 12/24-bit video units Three SDIO/MMC/CE-ATA controllers I2C I2S Two UARTs GPIOs Hi-Speed Serial Input S/PDIF General Interface supporting NAND/NOR flash, IDE and Ethernet PLLs and RTC

Memory Interface

Mobile SDR, DDR and DDR2 64/32-bit data bus 166/266MHz 1Gbyte address space